| 单词 | wafer level |
| 释义 | 例句释义: 圆片级,晶圆级,晶圆级封装,硅圆片级 1. The sub-threshold current test, which is often done at the wafer level, is a measure of how quickly the device will turn on and off. 亚阈区电流测试常常在晶圆片级进行。它是表示器件打开和关闭的快慢程度的参数。 www.eefocus.com 2. The invention relates to a wafer-level lens module and a manufacturing method thereof. 一种晶圆级镜头模组及其制造方法。 ip.com 3. The part is available in a 32-lead lead frame chip scale package (LFCSP), and a 25-ball wafer level chip scale package (WLCSP). 该器件提供两种封装：32引脚架构芯片级封装（LFCSP）和25引脚晶圆级芯片规模封装（WLCSP）。 www.bdtic.com 4. Wafer-level IC test probe card is mainly used in the test of chips electric characters before packaging. 集成电路圆片级测试探卡主要应用于分片封装前对芯片电学性能进行初测。 dictall.com 5. One should cover the resistance with metal layer, to avoid the damaged during the wafer level testing. 用金属覆盖电阻，避免wafer级测试时的损伤。 rt2innocence.cn 6. Other typical low current measurements on wafer level semiconductors are related to the dielectric, either the oxide or compound quality. 另一些对于晶圆片级半导体的弱电流测量则通常与介电材料（氧化物或化合物）的质量有关。 www.eefocus.com 7. The wafer level packages meet both the trend and low cost requirement. The wafer level packages get popular in market. 其中符合轻薄短小与高密度的要求，并且可以大幅度降低成本的晶园级封装越来越受到重视。 www.fabiao.net 8. This is of ten the case when switching several Source-Measure Units (SMUs) to multipin devices or wafer level semiconductor measurements. 在将几个源测量单元（SMU）切换至多连接端子装置或晶圆级半导体测量就属于这种情况。 www.eefocus.com 9. Through the silicon bonding, we achieve a wafer-level vacuum package, and the wire-bonding PAD is made after the fabrication is complete. 在完成整体结构圆片级真空封装的同时，通过引线腔结构方便地实现了中间电极的引线。 www.dictall.com 10. Low cost is assured by trimming and calibration at the wafer level. 低的价格靠晶片水平上的微调和定标来确保。 zhidao.baidu.com 1. Lithography Equipment Meets Miniaturization Trends in Wafer-Level-Packaging 满足晶圆级封装微型化的曝光设备 www.ilib.cn 2. Wafer Level Chip Size Package Technology and its Applications 晶圆级芯片尺寸封装技术及其应用 www.carreviews.cn 3. Development and Application of Modern Wafer-level Packaging Technology 现代圆片级封装技术的发展与应用 www.ilib.cn 4. Novel Alignment Technologies For Wafer Level Packaging 圆片级封装的新颖对准技术 www.ichacha.net 5. Explore New Challenges of Wafer Level Die Attach Film for Wafer Preparation Process 探索晶圆级芯片贴装薄膜和芯片制备集成工艺的新挑战 www.ilib.cn 6. Wafer Level Reliability Evaluation of Gate Oxide for Advanced CMOS Process 先进CMOS工艺栅极氧化膜的硅片级可靠性评价 www.ilib.cn 7. Wafer-Level Test System of Wiring Metallization Electromigration 金属化布线晶片级测试系统 www.ilib.cn 8. A Novel Package for Microelectronics: Wafer Level Package 一种新颖的微电子封装：圆片级封装 scholar.ilib.cn 9. Wafer Level Si-Si Hermetic Bonding with the Benzo-cyclo-butene Material 用苯并环丁烯进行圆片级硅–硅气密性键合 ilib.cn 10. Ultrathin Wafer Level Chip Size Package Technology 超薄型圆片级芯片尺寸封装技术 www.ichacha.net 1. Lead-Free Solder Bumping Technology for Wafer Level Package 圆片级封装的无铅焊料凸点制作技术研究 www.ilib.cn 2. Wafer-level hermetic package of MEMS by glass solder at low temperature 玻璃浆料低温气密封装MEMS器件研究 ilib.cn 3. Design and fabrication of microheater array for MEMS wafer-level scale hermetic package MEMS圆片级气密封装微加热器阵列的设计和工艺研究 www.ilib.cn 4. Research of gold bump for wafer level package 用于圆片级封装的金凸点研制 www.ilib.cn 5. The Development of Wafer-level Packaging 圆片级封装技术展望 www.ilib.cn |
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