VLSI

One of the most famous was the "Berkeley VLSI Tools Tarball" , a set of UNIX utilities used to design early VLSI systems.

Arising from the VLSI design and network communication, the cut width of a graph G is the minimum congestion for embedding G into a path.

VLSI implementation of an image-reject filter for initial demodulator circuit used in QAM receiver chip for digital TV presented.

As the density of VLSI circuit increases, the proximity effect has been one of the critical issues in optical lithography.

The VLSI implementation of the CWT(continuous wavelet transform) can be divided into two methods: time-domain and frequency-domain.

of graphs has been used in the design of VLSI.

This paper addresses a low-cost VLSI implementation of the Advanced Encryption Standard (AES) cryptographic engine.

However, implantation, with its obvious advantages, will continue to play a major role in VLSI in the foreseeable future .

Consequently, reduction of crosstalks between interconnection wires has become important in VLSI (very large scale integration) design.

Electrothermal Analysis of VLSI Systems addresses electrothermal problems in modern VLSI systems.

Boundary-scan technology (BST) is a new and effective way of test and design-for-testability ( DFT ) for VLSI circuits.

The final network has been implemented in custom VLSI, enabling letters to be sorted at high speed.

A method for threshold selection and decision to obtain noise characteristics in VLSI circuits was presented.

The next era began more or less with the publication of "Introduction to VLSI Systems" by Carver Mead and Lynn Conway in 1980.

A new algorithm combined the buffer insertion and wire segmentation of VLSI design in deep submicron environment was presented.

In deep sub- micron VLSI technologies, the interconnect delay has become a dominant factor affecting performance of ICs.

SOC (System-on-a-Chip) . is the development trend of current international VLSI and is the mainstream of IC development in the new century.

The advantage and disadvantage of using ant colony algorithms is researched in VLSI routing.

Modern VLSI CPUs also use a diode matrix for the read-only control store[citation needed].

Accordingly, this phenomenon also must be taken into account when dealing with VLSI circuits, such as microprocessors or memory devices.

Making in the center of " 15 " in the plan, emphasize wanting to advance the industrialization of VLSI and new technology mainly.

These 3 circuits are used to design a PWM VLSI neural network to solve the exclusive or (XOR) problem.

Aimed at improving test accuracy of analog VLSI circuits, an approach based on digital signal processing (DSP) is presented.

A novel divider based on dual-bit algorithm and its VLSI implementation are presented.

The existing VLSI neural network design method based on the pulse width modulation (PWM) technique is modified in this paper.

A novel parallel algorithm for distance transformation based on VLSI hardware structure is proposed in this paper.

At first, this thesis introduces the VLSI physical design process, based on this leads to the rectilinear Steiner tree problem.

High-level design intents such as finite state machine (FSM) and counter are commonly used in modern VLSI design.

Advances in VLSI will have a profound effect on the world economy , because VLSI is the key technology for the Information Age .

This paper pays attention to the practicability and superiority using ant colony algorithms in VLSI routing.

With the development of VLSI technology and communication technology, the Digital TV technology develops rapidly.

With the development of VLSI and ISP (in system programmable) technique, the way of design digital circuit has changed great.

"It's a huge challenge for them, " said Dan Hutcheson an analyst at VLSI Research.

For example, one of the constraints in VLSI routing problems is minimizing wire length.

But for the design of 64-bit stream processor, there are many challenges because of the limit of VLSI technology.

In 80s and early 90s of 20 century, the methodology of digital VLSI is full-custom or standard cell based.

With the development of VLSI circuit design, it becomes more and more important for implementing image scaling by hardware.

Along with the development of manufacture technology of VLSI, IC design emphasizes reusable design and short design cycle more and more.

State of the Art on Study of Parametric Yield and Its Optimization for VLSI

Characterization of Al Via Electromigration in VLSI Interconnection and Its Reliability Research

Bit plane-parallel VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing

Design and VLSI Implementation of an Application Specific Instruction Set Security Processor

Algorithm and VLSI architecture for computational complexity scalable block marching motion estimation

Technologies used in preparation and test of low dielectric constant materials for VLSI

Wavelet Transform And Motion-compensated Temporal Filtering: Vlsi Architecture And Memory Analysis

Boundary Scan Technology and Its Application on VLSI Chip's Interconnection Circuit Test

VLSI Design of an Elliptic Curve Cryptosystem with Re-Configurable Architecture

Scalable VLSI Design and Implementation for Asymmetric Keys Cryptosystems Coprocessor

Method of high-speed fractal image compression processing and its VLSI implementation

Design of Embedded Graphic Generator for High Temperature Dynamic VLSI Burn-in Test System Using Programmable ASIC Technology

VLSI implementation of parameters selectable high-speed elliptic curve cryptosystems

An Efficient Digit-Serial Finite Field Multiplier and Its VLSI Implementation

The Quick Evaluation Technique for the Reliability of the VLSI Interconnects

VLSI Design of a New-Type Coprocessor for Elliptic Curve Cryptosystems

Effective VLSI Architecture for Multi-level Recursive Discrete Lifting Wavelet Transform

Fast method to calculate the frequency- dependent resistance and inductance of interconnect in VLSI circuits

A VLSI Architecture of a Hierarchical Motion Estimator

Simulated Annealing and Parallel Realization: Application on VLSI Block Placement

VLSI Implementation of Modified Approximate Squaring Algorithm

VLSI Thermal Placement Optimization Using Simulated Annealing

Issues and Solutions of the Clock Distribution Network in High-Performance VLSI Design

Numerical Simulation of Time Delay and Cross-talk Noise for the Interconnect in VLSI Circuits

These two subproblems have important applications to numerical algebra, VLSI-layout and algorithm graph theory respectively;

Progress of Aqueous Solution Cleaning Technology for Silicon Wafer in VLSI Circuit Fabrication

International Symposium on VLSI Technology, Systems and Applications; VLSI-TSA

VLSI implementation of recognizer for software watermarking in embedded system

Research on the Boundary-Scan Test Bus Fault Diagnosis and Its Strategy for VLSI

A Precise Integration Algorithm for Transient Simulation of Interconnects in High-Speed VLSI

Reversible Variable Length Decoder Design and VLSI Implementation

Implementation of VLSI architecture for integer wavelet transform

One High-Efficiency Arithmetic for Transient Simulation of Interconnects in High-Speed VLSI

Design of Multilevel Filter VLSI Architecture for Infrared Image Processing

A Deterministic VLSI Block Placement Algorithm Using Less Value First Principles

A feasible model of VLSI implementation for visible watermarking in digital still images media

Hybrid searching strategy for the optimal spare allocation in VLSI systems

A Dynamic Hierarchical Framework for VLSI Parallel Test Generation Systems

An Optimization Algorithm for Minimizing Crosstalk in VLSI Circuit's Physical Design

Adaptive Frame Rate up Conversion with Field-Frame Detection and VLSI Implementation

Schottky Contact Property and Annealing Condition of Titanium Silicides in VLSI

The VLSI Implementation for Modular Exponentiation of Large Operands

An Efficient VLSI Architecture Design for Full Search Block-matching Algorithm

New Multilayer Copper Interconnect Technologies for VLSI

Analysis and VLSI Design for Reusable Fractional Motion Vector Cost Generator

Rectangular Defect Model and Critical Area Computation of Real Defect Outlines in VLSI

Design for Testability of a Novel High-Speed DCT in VLSI

A new VLSI implementation of the continuous wavelet transform

A block-matching algorithm based on hardware implementation and its VLSI architecture

Study on Automatic Tuning Analog VLSI Model for Power System Transient Stability

An improved arithmetic coding algorithm for VLSI realization

The Overseas Military VLSI Application and Development Trend

The Technique for Failure Analysis and Control of Plastic Encapsulated VLSI

Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology

A Geometry Explanation of Center of Gravity Algorithm of VLSI Parametric Yield

Improved FFSBM Algorithm and Its VLSI Architecture for AVS Video Standard

An Efficient VLSI Architecture for Motion Compensation of AVS HDTV Decoder

An Optimal Algorithm for VLSI L-Channel Routing with Crosstalk Constraints

Study on advancing timing characterization in VLSI circuits

A VLSI Implementation of Centralized Multi-Queue Management

Binary Motion Estimation and Design of VLSI Architecture for Shape Coding

VLSI Architecture for Digital Signal Processing

Application and Advances of Reliability Technology in VLSI

Strategic Analysis of the Chinese VLSI Design Services and Semiconductor Packaging Markets

Analysis of the transient stability of the one-machine infinite bus system using VLSI

An Algorithm for VLSI Multi-layer Channel Routing with Minimal Crosstalk

An Embedded Real-Time Prediction Method for VLSI Hot-Carrier Degradation

Efficient VLSI Design for Elliptic Curve Cryptograph

Estimation of Crosstalk Peak for VLSI Synthesis and Design Planning

A VLSI Architecture for Full Search Bock Matching Motion Estimation

Development of New Generation High Temperature Dynamic VLSI Burn-in Test System

A new motion estimation algorithm based on hardware implementation and its VLSI design

An improved algorithm for VLSI circuit partitioning

Crosstalk Estimation and Optimization in Deep Sub-Micron VLSI

The VLSI Design of Digital Filter for Multi-standard Digital Video Encoder

Crosstalk Modeling for Deep Sub-micron VLSI Interconnect

In-situ Observation of Stresses in VLSI Al Interconnects by Using the Synchrotron Radiation X-Ray Diffraction Technique

VLSI Design, Test and Electronic Design Automation

Large Scale VLSI Module Placement Using LFF Heuristics by Stages

Design of Pseudorandom Sequences with Phase Shifts for VLSI Test

Validation Analysis and Test Flow Optimization of VLSI Chip

VLSI Techniques & Its Examination VLSI

An Application of Domain Theory to Logical Design of VLSI Circuits

General discussion about VLSI System Design

The satus of international VLSI production state

New challenges of deep sub-micro and mixed-signal silicon VLSI design

A Survey of the Short and Open Fault Models for VLSI Circuits

VLSI Implementation of a High-Efficiency 8-Bit Embedded MCU

VLSI implementation of image compression coding based on lifting wavelet transform

The Problem About Stress Migration in the VLSI Manufacture

Research on Application of Tanh Transform in VLSI Design

An Improved Model and Method of Calculating the VLSI Critical Area

Design and Implementation of VLSI Physical Design Data Markup Language-PhyD-XML

The Discussion on Jitter in Deep Sub-micrometer VLSI Design

The method for VLSI yield optimization design based on the sub-processing-element level redundancy

VLSI, Very Large Scale Integrated circuit

A VLSI yield improvement methodology based on the optimization of interconnect width

The Technique for High and Low Temperature Testing of VLSI

Method of Data and Control Partition in VLSI Design of SCI Interface

Static Timing Analysis of Deep Submicron VLSI

Internal Gettering of Silicon Wafers for VLSI

Optimal Design of Deep Submicron VLSI Buffer Using the Genetic Algorithm

Design and application of PFM neural network VLSI

The Research on Fluorinated Carbon Film for VLSI

A VLSI Routing Algorithm with Minimum Time Delay

Method of Eliminating Error Caused by User's Aid-hardware during the Test of VLSI Chip

IEEE International Conference on VLSI Design ICVLSI

Research of VLSI Interconnection Fault Diagnosis Based on Boundary Scan

Testing and Testable Design of VLSI Systems

The Layout Theories and Algorithms for VLSI

Estimation of coupling noise in VLSI design

Thin shrink small outline package VLSI

emerging trends in vlsi test and diagnosis

On-chip Inductance Modeling of VLSI Interconnects Based on Neural Networks

Research on Designing VLSI Circuits Based on Boundary-scan Technology

An Efficient VLSI Architecture for MPEG-4 Motion Estimation

New algorithm for VLSI production sequencing problems based on fuzzy rule

Lighting Design for VLSI Factory

Introduction to VLSI Circuits and Systems

VLSI Layout System Integration Based on Multi-Layer Mechanism

Optimizate VLSI Wire by Modified Active Set Method

VLSI implement of image encryption algorithm based on chaos

Fault Diagnosis Based on Neural Network VLSI and Noise Signal

Some key problems in the design of ultrapure water for VLSI

Technology and Development of Si VLSI

Analysis and Design of VLSI

Physics and Technology of VLSI