semiconductor substrate

A second-conductivity-type well is formed in a su*ce layer of a semiconductor substrate extending over the plurality of the repeating units.

A first conductive impurity ion is implanted into a semiconductor substrate to form a well area on which a gate electrode is formed.

The one gate insulating layer may be interposed between the common gate electrode and the one pair of fins of the semiconductor substrate.

and a second active region in the semiconductor substrate and of an opposite conductivity type than the first active region.

A semiconductor substrate is provided with a gate structure, and a source and drain on opposing sides of the gate structure.

In an example embodiment, a method for adhering MSQ provides for a liner oxide on an aluminum alloy layer on a semiconductor substrate.

An integrated circuit includes an array of memory cells and a doped semiconductor line formed in a semiconductor substrate.

The invention relates to a method of manufacturing a semiconductor substrate structure for use in a semiconductor substrate stack system.

A semiconductor device may include a semiconductor substrate and a plurality of shallow trench isolation (STI) regions in the substrate.

A C4 grind tape and a laser-ablative adhesive layer are formed on a front side of a semiconductor substrate.

A second impurity diffusion layer, which occupies a space within the semiconductor substrate, overlaps with the floating gate.

The portion of the protective layer formed over the active region is removed to expose the active region of the semiconductor substrate.

In an embodiment, the method includes forming a gate dielectric layer on a semiconductor substrate.

A protective layer over the semiconductor substrate is formed to fill the portion of the etched flowable insulation layer.

The semiconductor substrate may be an SOI (silicon on insulator) structure.

The present invention generally provides apparatus and method for forming a clean and damage free surface on a semiconductor substrate.

The semiconductor structure includes a semiconductor substrate, a trench in the semiconductor substrate.

A method for fabricating a multiple layer silicon nitride film on a semiconductor substrate is provided herein.

A semiconductor device may include a semiconductor substrate, one common gate electrode, and one gate insulating layer.

In the first polishing step (S20), the compound semiconductor substrate is polished with a chloric polishing agent.

A method of fabricating a nonvolatile memory device includes preparing a semiconductor substrate including a cell array region.

A semiconductor charge storage device includes a semiconductor substrate having a surface region.

The method also includes forming a recessed region in the cell array region by etching the semiconductor substrate.

The exposed active region of the semiconductor substrate is cleaned.

The assembly of the film frame tape, the thinned semiconductor substrate, and the C4 grind tape is diced.

The micro machinery commonly is formed by a semiconductor substrate such as a silicon wafer.

First of all, a mask is applied to the semiconductor substrate in order to define a window that is delimited by a peripheral edge.

a plurality of photodiodes and a plurality of transistors, which are formed in a sensing part of the semiconductor substrate;

Disclosed herein is a semiconductor device, including: a gate electrode formed on a semiconductor substrate through a gate insulating film;

and a drain region formed in the semiconductor substrate on the drain side of the gate electrode through the LDD region;

An infrared temperature-measuring system for a small high-temperature region on semiconductor substrate

cleaning the semiconductor substrate, on which the grid electrode is formed;

forming a hard mask layer and a patterned photoresist layer on the semiconductor substrate;

a source region formed in the semiconductor substrate on the source side of the gate electrode through the extension region;

The method includes the steps of forming an interlayer dielectric on a semiconductor substrate having a metal line forming region;

The method for manufacturing the bipolar transistor comprises the following steps of: forming an active region on a semiconductor substrate;

A semiconductor device comprises an active region formed in a semiconductor substrate;

forming light dope drain regions in the semiconductor substrate below the lateral wall of the groove respectively;

an extension region formed in the semiconductor substrate on a source side of the gate electrode;

A method for forming a lightly doped region comprises the following steps: forming a grid electrode on a semiconductor substrate;

an upper insulating interlayer formed above the semiconductor substrate;

a plurality of channels extending from inside the semiconductor substrate to inside the dielectric layers;

An integrated circuit structure includes a semiconductor substrate;

using the gate oxide layer and the silicon nitride layer as masks to etch the semiconductor substrate and form a shallow channel;

carrying out heat treatment to the cleaned semiconductor substrate;

The method for preparation contains the following steps: (1) choosing proper semiconductor substrate;

a first active region in the semiconductor substrate;

The structure includes: a body (105) formed in a semiconductor substrate (175);

a source-drain diffusion layer formed on that surface of the semiconductor substrate which is adjacent to both sides of the gate electrode;