In order to meet with the requirements of high-speed, the source coupled FETlogic (SCFL) is applied in all of the circuits.
为了适应高速度的要求，所有电路全都采用源极耦合场效应管逻辑来实现。
2
The pre-functional cell of standard buffered FETlogic (BFL) adopted by the gate array possesses nine logic functions, two different kinds of driving capabilities, and the level control ability.