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译码器的记忆 以上为机器翻译结果，快速获取精准的人工翻译结果，建议选择有道人工翻译 1 ?译码器内存 ... 译码器输入速率 decoder input rate 译码器内存 decoder memory 译码器要求 decoder requirements ...
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This Viterbi decoder has low latency, efficient memory organization, and low hardware complexity compared with other Viterbi decoders using traditional trace-back methods. 与采用传统回溯法的译码器相比，该译码器具有较低的译码时延、有效的存储空间管理和较低的硬件复杂度。 - 2
The crucial path includes address buffer, decoder, memory unit, sense amplifier and output buffer. 其中包括地址缓冲、译码器、存储单元、灵敏放大器和输出缓冲电路。 - 3
The FPGA is designed as a MVB controller which consists of Manchester encoder, Manchester decoder, buffer, center control unit, internal memory, MCU interface and so on. FPGA实现MV B控制器功能，分为曼彻斯特编码器、解码器、缓冲区、中央控制单元、内部存储器和单片机接口等几部分。
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