The radix-2 decimation-in-timealgorithm based on 16-bit fixed-point operation and pipeline architecture are adopted in the core module IFFT(Inverse Fast Fourier Transform).
核心模块快速傅立叶逆变换（IFFT）采用基于16位定点运算的基-2时间抽取算法和流水线结构。
2
This design adopts the algorithm of radix-4 and decimation-in-time (DIT) to devise a real-time FFT hardware processor with practicality.
设计采用基4 算法设计了一个具有实用价值的FFT 实时硬件处理器。
3
The decimationintime (DIT) radix-2 FFT algorithm is analyzed in details with input in normal order and output in bit-reversed order by the binary method.