Testing system, in which DSP is the part of core and CPLD is as peripheral circuit, controls operation parts, and test or incept the digital signal, analog signals and switch signals from exterior.

Introduction was made to the composition and working principle of a power-off time delay relay which adopts CMOS digital circuit, digital dial disc for switch setting and without auxiliary power.

For circuits design, the thesis designs a switch capacitor comparator circuit, a two stage amplifier, a digital correction circuit and a clock pump-up circuit.