To reduce the power dissipation and chip size of digital calibration circuits of pipelined analog-to-digital converter (ADC), a new statistics-based background calibration technique is presented.

This paper describes the design and analysis of a fully differential, gain-enhanced CMOS telescopic operational transconductance amplifier (OTA) used in a pipeline analog-to-digital converter (ADC).

A method of implementing digital lock in amplifier with DSP (digital signal processor) and sampling ADC (analog digital converter) is discussed.