This paper introduces the design and realization of a high-speed and low-cost virtuallogic analyzer based on FPGA and USB2.0 bus.
本文介绍了一种基于FPGA的USB2.0高速、低成本的虚拟逻辑分析仪的设计原理与实现方法。
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The virtual network Lab is coming as the times require, there are the instruments which simulated by software, it can generate some valuable and virtualLogic instruments as even.
On the basis of above mentioned, this thesis discusses the research and design of virtuallogic analyzer based on the full use of FPGA technology and virtual instrument technology.