A timingverification research on the general processor used for communication and network is written in this dissertation.
论文对一个用于通信和网络的通用通信处理器的时序验证进行了研究。
2
Static timing analysis is widely applied in timingverification because of its high speed and great capacity. The gate delay computing is a critical part of static timing analysis.
静态时序分析由于速度快和容量大而广泛应用于时序验证,而门延时的计算则是静态时序分析中的关键部分。
3
Finally USES FPGA platform for BIST functions and timingverification, and through design compiler, static timing analysis, automatic placing and routing to achieve a BIST system layout.