The design method for the efficient time-varyingnetwork architecture of the fractional multiple sampling rate converter is presented and its field programmable gate array (FPGA) is implemented.
提出了分数倍抽样率转换器的高效时变网络结构的设计方法，并用现场可编程门阵列(FPGA)实现。
2
The time parameter is also imported into the neural network to give the time-varying characteristic of the process.
为表达过程时变的特点，引入时间参数作为神经网络的一个输入量。
3
In this paper, according to nonlinear and time-varying parameter of ship maneuvering, the scheme of neural network adaptive PID control is proposed.