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单词 Three-state logic
释义
Three-state logic
  • 简明释义
  • 三态逻辑(三态逻辑允许输出高阻态,避免输出影响后级电路,实现多个电路共用输出线)
  • 网络释义
  • 1

    ?三态逻辑

    ... High state logic level 高状态逻辑电平 Low state logic level 低状态逻辑电平 three-state logic 三态逻辑 ...

  • 2

    ?三态逻辑电路

    ... three state logic 三态逻辑 three-state logic 三态逻辑电路 three-state logic circuit 三态逻辑电路 ...

短语
  • 双语例句
  • 1
    This paper discusses the connection of state delay and digital logic electron technology from three ways.
    本文从三个方面论述延迟现象与数字电子技术的关系。
  • 2
    Through adding a zero-crossing comparator and optimizing the inverter switching logic, this method which is based on the traditional two-state hysteresis control can achieve three-state outputs.
    该方法是在传统的两态滞环控制的基础上,增加过零比较器,通过优化逆变器的开关逻辑,从而实现滞环控制下并网逆变器的三态输出。
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更新时间:2025/1/15 20:55:19