... 商业逻辑系统 Business Logic Systems 顺序逻辑系统sequential logic system 数理逻辑系统 logistic system ...
双语例句
1
Sequentiallogic synthesis is an important part of RTL synthesis system design.
时序逻辑综合是RTL综合系统设计中的一个重要部分。
2
Furthermore, in order to avoid clock skew familiar in high-speed sequentiallogic circuits, negative clock skew system is used in clock routeway and buffers are placed in clock-tree.