Then the receiverstructure and mathematical model, signal collection chip and fpga-main implementation device of digital down conversion are introduced.
接着介绍了接收机的构成和数学模型、采用的信号采集芯片及实现数字化下变频的主要器件—FPGA。
2
An iterative multi-user detection receiverstructure is proposed for multiple input multiple output interleave division multiple access (MIMO-IDMA) systems.
提出了一种多入多出交织分多址(MIMO - IDMA)系统的迭代多用户检测架构。
3
Presents an overall link level simulation of mobile terminal receiverstructure with smart antenna for TD-SCDMA. Three smart antenna algorithms are simulated and compared.