The defining characteristic of a rope is that it does away with this restriction, instead allowing fragments of the rope to reside noncontiguously and joining them using concatenation nodes.

In the part, we do not merely analyze relevant factors in the concrete language phenomenon and restriction elements, and still investigate laws and characteristic that used from the dynamic course.

This paper presents a performance based redesign algorithm for LUT type FPGA. The algorithm uses characteristic functions and presents a redesign method based on restriction for an original relation .