In the computations of 3d VLSI parasiticinterconnect capacitance, it is very difficult to partition the boundary elements on a multi hole surface.
在3d VL SI互连寄生电容的边界元素法计算中,多孔平面的边界元划分是十分困难的问题。
2
The influence of parasiticinterconnect capacitance is much in evidence with the progress of the semiconductor techniques and the increase of chip density and calculated speed.
随着半导体工艺的进步,芯片集成度和运算速度的提高,互连寄生效应的影响也日益明显。
3
The approximate function relationships are obtained by analyzing the impact of interconnect geometric parameters fluctuation on the interconnectparasitic parameters.