This paper presents a high speed PCM demodulation circuit through which the serialparallelconverter plays a role of demodulating and the hardware realizes frame synchronization.
It USES FPGA as its main control chip. The FPGA comprises a spike generator, a serial-to-parallelconverter and some multiplexers.
采用FPGA作为主控芯片，在FPGA内部设计了刺激脉冲发生器，多路选择器和串并转换器。
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In the design and application of ultra-high-speed parallel-to-serialconverter, a new method is proposed, which is called duplex constant-current-source structure(DCS).