The advantage of dual basis bit parallelmultiplier in terms of the scale of hardware is explained.
说明了对偶基比特并行乘法器在硬件规模上的优越性。
2
A new high regular structure of partial parallelmultiplier for irreducible trinomial generated finite field is proposed.
提出了一类新的具有高度规则性的部分并行三项式有限域乘法器架构。
3
DSP technologies have applied in every field of digital signal processing because of its parallelmultiplier, pipeline structure and fast On-Chip memory.