The phase-lockedsystem is a closed loop automatic control system that can follow the frequency and phase of the input signals.
锁相系统是一个能够跟踪输入信号频率和相位的闭环自动控制系统。
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The research of this project is concentrated on PLLs phase noise. It aimed at discovery some special difficulty in implementing phase-lockedsystem.
本文主要研究了锁相环的相位噪声问题,研究目的在于揭示锁相系统设计过程面临的一些特殊问题。
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So, it's very necessary to deeply research the principle of phase-lockedsystem, capture the design and analysis method, set up IP library and afford ready design block for system.