Because of its separate structure between microprocessorbus and DMA bus, the recorder achieves higher data transfer rate.
由于采用分离的微处理器总线和DMA总线结构，因此实现较高的数据存储速率。
2
The internal processor bus described in Sec. XX is connected to the external processor bus by a set of bus buffers located on the microprocessor integrated circuit.
XX节所描述的内部总线通过一组位于微处理器集成电路内的总线缓冲器与外部总线连接。
3
This paper focuses on performance estimation of the embedded microprocessor based on the on-chip bus, including on-chip bus modeling, high-level simulation environment building and their combination.