A special testing sequence input is need for measuring maximum dyna - mic current of a combinational logiccircuit.
组合逻辑电路的最大动态电流测试应在电路的原始输入端施加一个特定的测试序列才能实现。
2
The digital logic chip of the invention and the method of design for testing can realize the observation of circuit scanning test by adopting few pins.