Different bias voltage for the input buffertransistor.
不同偏置电压的输入缓冲晶体管。
2
In addition, the buffer layer can mitigate parallel conduction issues between transistor devices and the silicon substrate.
此外,缓冲层可以减少晶体管之间的设备和硅衬底平行的传导问题。
3
In addition, the buffer layer addresses and mitigates lattice mismatches between the film relative to which the transistor is formed and the silicon substrate.