What is the difference between interrupt latency and interrupt response?

To the deficiency of the existing method, this paper has proposed a method, which use backup-buffer to save the status of pipeline, can improve the efficiency of interrupt response.

Realize the interface between PCI9054 and the PCI bus, including the bus arbitration, read and write of the registers, the configuration of the EEPROM, the DMA transfer, interrupt response and so on.