The method of weakening integral when meeting limit is used in the common rail pressure PID control. The sampling cycle is obtained from the stepping curve, and many factors are considered.
When DRNN predicts that the number of cells in buffer exceeds the threshold limit in the next time cycle, a control signal is generated by the controller to throttle arrival cell rate.
The current-mode control architecture facilitates easy compensation design and ensures cycle-by-cycle current limit with fast response to line and load transients.