A backside growth technique of thick porous silicon layers for the on-chip RF integratedinductor is presented.
介绍了一种用于高品质射频集成电感的厚膜多孔硅背向生长技术。
2
An interconnection structure is formed through the buried insulating layer to connect the integratedinductor to the integrated circuit.
形成穿过掩埋绝缘层的互连结构，以连接集成电感器和集成电路。
3
Coplanar transmission lines and integrated inductors are fabricated on different SOI substrates with standard CMOS processes. The attenuation mechanism of the CPW and inductor is analyzed.