A new analytical model and some algorithms based on the conventional gate-levelsimulation are presented in this article.
本文在传统的门级逻辑模拟模型和算法的基础上引进了一些新概念,导出了一种新的分析模型和算法。
2
GFMS is a Gate and Function Block of mixed-levelsimulation system, which is designed for experiment of Digital Logical.
GFMS是针对《数字逻辑》课程实验而设计的数学电路模拟系统。
3
The LOP circuit module is described in gatelevel with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.