英语词汇gate level simulation怎么读，是什么意思，单词翻译、读音、固定搭配用法和短语词组及例句-英汉双解词典

单词

gate level simulation

释义

gate level simulation

简明释义

门级仿真：指在数字电路设计中，使用门级逻辑模型进行的仿真。
门级逻辑模拟：指在数字电路设计中，使用门级逻辑模型进行的模拟。

网络释义

1
?门电路级模拟
博客 ... gate insulator 栅极绝缘层 gate level simulation 门电路级模拟 gate line 栅极线 ...
2
?门电路级模仿
... gate insulator栅极绝缘层 gate level simulation门电路级模仿 gate line栅极线 ...
3
?逻辑闸层次模拟
将「功能模拟（Function Simulation）阶段的模拟结果以及「逻辑闸层次模拟（Gate Level Simulation）阶段的模拟结果，比较他们之间的讯号输出与预期的结果在讯号的波形(Function及时序（Timing）…等方面是否相同。
4
?闸位准模拟
... 闸级模型 gate level model 闸位准模拟 gate level simulation 闸脉冲 gate pulse ...

短语

1
conventional gate-level simulation
计传统的门级模拟
2
conventional gate level simulation
惯用闸位准模拟
3
gate level logic simulation
计门级逻辑模拟 ; 闸位准逻辑仿真

双语例句

1
The design of MCS-51 Microcontroller is followed the Top-Down design way, including system partition coding (VHDL) RTL simulation synthesis, gate level simulation ect.
对MCS—51单片机进行正向设计，包括系统划分、编写代码、RTL级仿真与综合、门级仿真等。
2
GFMS is a Gate and Function Block of mixed-level simulation system, which is designed for experiment of Digital Logical.
GFMS是针对《数字逻辑》课程实验而设计的数学电路模拟系统。
3
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。

随便看

英汉双解词典包含3185865条英汉词条，基本涵盖了全部常用单词的翻译及用法，是英语学习的有利工具。

单词	gate level simulation
释义	gate level simulation 简明释义门级仿真：指在数字电路设计中，使用门级逻辑模型进行的仿真。门级逻辑模拟：指在数字电路设计中，使用门级逻辑模型进行的模拟。网络释义 1 ?门电路级模拟博客 ... gate insulator 栅极绝缘层 gate level simulation 门电路级模拟 gate line 栅极线 ... 2 ?门电路级模仿 ... gate insulator栅极绝缘层 gate level simulation门电路级模仿 gate line栅极线 ... 3 ?逻辑闸层次模拟将「功能模拟（Function Simulation）阶段的模拟结果以及「逻辑闸层次模拟（Gate Level Simulation）阶段的模拟结果，比较他们之间的讯号输出与预期的结果在讯号的波形(Function及时序（Timing）…等方面是否相同。 4 ?闸位准模拟 ... 闸级模型 gate level model 闸位准模拟 gate level simulation 闸脉冲 gate pulse ... 短语 1 conventional gate-level simulation 计传统的门级模拟 2 conventional gate level simulation 惯用闸位准模拟 3 gate level logic simulation 计门级逻辑模拟 ; 闸位准逻辑仿真双语例句 1 The design of MCS-51 Microcontroller is followed the Top-Down design way, including system partition coding (VHDL) RTL simulation synthesis, gate level simulation ect. 对MCS—51单片机进行正向设计，包括系统划分、编写代码、RTL级仿真与综合、门级仿真等。 2 GFMS is a Gate and Function Block of mixed-level simulation system, which is designed for experiment of Digital Logical. GFMS是针对《数字逻辑》课程实验而设计的数学电路模拟系统。 3 The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder. LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
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