This flow could use the gatedclock, the operand isolation and the gate level optimization to decrease the power consumption without changing the original design.
这种综合流程在不改变原有电路设计的前提下同时采用了门控时钟、操作数隔离和门级功率优化来降低功耗。
2
Many go to live in one of the increasingly popular fortress-like gated communities, protected around the clock by armed guards.
许多人倾向于居住在日益兴盛的堡垒式社区内,这些社区有24小时的安保服务。
3
This paper concentrates on using gated-clock in low-power design of CMOS circuits.