As an example, a clustering algorithm is given for gatearrays with macrocells to obtain multi-objective optimization.
作为例子,针对带宏单元的门阵列给出了相应的算法。
2
The gated silicon field emitter arrays (FEA) with small gate aperture have been successfully fabricated by dry etching, including ion beam etching (IBE) and reactive ion etching (RIE).
利用离子束刻蚀(IBE)和反应离子刻蚀(RIE)等干法刻蚀方法来制造带栅极的场发射阴极阵列。
3
A digital hardware control scheme of shunt active power filter (SAPF) based on field programmable gatearrays (FPGA) is introduced.