We focus on the carrier synchronization method, the circuit and its parameters design, the performance simulation and the circuit implementation in Field Programmable GateArray (FPGA).
In this paper a method of designing and implementing Field Programmable GateArray (FPGA) digital modulator based on the improved Direct digital Synthesizer (DDS) technology is presented.
The design method for the efficient time-varying network architecture of the fractional multiple sampling rate converter is presented and its field programmable gatearray (FPGA) is implemented.