This is achieved through pipelining at the hardware level.
在硬件级别中，通过使用流水线操作来完成这个任务。
2
To overcome the shortcoming of low speed and low efficiency of genetic algorithm's software implementation, two hardware implementation schemes of serial and pipelining realization are put forward.
针对遗传算法软件实现速度慢、效率低的缺点，提出了便于算法实现的串行和流水线两种硬件实现方案。
3
A new method for calculating 2-d mask convolution based on FPGA is presented. Compared with traditional methods, it achieves the same depth of pipelining with fewer hardware resources.