英语词汇frequency locked loop怎么读，是什么意思，单词翻译、读音、固定搭配用法和短语词组及例句-英汉双解词典

单词

frequency locked loop

释义

frequency locked loop

简明释义

锁频回路，频率锁定的环路，频率锁定环路

网络释义

1
?频率锁定的环路
... FLIR Forward Looking Infra C Red (system) 前视红外探测系统 FLL Frequency Locked Loop 频率锁定的环路 FL-LP FiLter C LowPass 低通滤波器 ...
2
?锁频回路
... 频率锁定 frequency lock 锁频回路 frequency locked loop 频率量测 frequency measurement ...
3
?频次锁定的环路
FLIR Forward Looking Infra – Red (system) 前视红外探测体例 FLL Frequency Locked Loop 频次锁定的环路 FL-LP FiLter – LowPrear end 低通滤波器 ..

短语

1
FLL Frequency Locked Loop
频率锁定的环路
2
frequency and phase locked loop
锁频
3
decimal sub-frequency phase-locked loop
小数分频锁相环

双语例句

1
The FLL features digital frequency locked loop (FLL) hardware that, in conjunction with a digital modulator, stabilizes the DCO frequency to a programmable multiple of the watch crystal frequency.
在FLL功能数字频率锁定环(FLL)的硬件，与数字调制器，稳定会计频率可编程多的观赏晶体频率。
2
Then presented the basic structure, phase model, frequency response and performance analysis for noise and spur, of phase locked loop (PLL).
然后介绍了锁相环(PLL)的基本结构、相位模型、频率响应、噪声及杂散性能。
3
This paper gives an analysis of parasitic frequency deviation in the digital phase locked loop, which is one of the important specifications of modern communication systems.
本文分析了数字锁相环路的寄生频偏，它是现代通讯系统中频率合成器的重要指标之一。

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英汉双解词典包含3185865条英汉词条，基本涵盖了全部常用单词的翻译及用法，是英语学习的有利工具。

单词	frequency locked loop
释义	frequency locked loop 简明释义锁频回路，频率锁定的环路，频率锁定环路网络释义 1 ?频率锁定的环路 ... FLIR Forward Looking Infra C Red (system) 前视红外探测系统 FLL Frequency Locked Loop 频率锁定的环路 FL-LP FiLter C LowPass 低通滤波器 ... 2 ?锁频回路 ... 频率锁定 frequency lock 锁频回路 frequency locked loop 频率量测 frequency measurement ... 3 ?频次锁定的环路 FLIR Forward Looking Infra – Red (system) 前视红外探测体例 FLL Frequency Locked Loop 频次锁定的环路 FL-LP FiLter – LowPrear end 低通滤波器 .. 短语 1 FLL Frequency Locked Loop 频率锁定的环路 2 frequency and phase locked loop 锁频 3 decimal sub-frequency phase-locked loop 小数分频锁相环双语例句 1 The FLL features digital frequency locked loop (FLL) hardware that, in conjunction with a digital modulator, stabilizes the DCO frequency to a programmable multiple of the watch crystal frequency. 在FLL功能数字频率锁定环(FLL)的硬件，与数字调制器，稳定会计频率可编程多的观赏晶体频率。 2 Then presented the basic structure, phase model, frequency response and performance analysis for noise and spur, of phase locked loop (PLL). 然后介绍了锁相环(PLL)的基本结构、相位模型、频率响应、噪声及杂散性能。 3 This paper gives an analysis of parasitic frequency deviation in the digital phase locked loop, which is one of the important specifications of modern communication systems. 本文分析了数字锁相环路的寄生频偏，它是现代通讯系统中频率合成器的重要指标之一。
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