An 8-bitinstruction register can only specify 256 different operations and variations on operations.
一个八位的指令寄存器也只能确定256种不同的操作以及对于这些操作的修改。
2
An attempt was made to execute a floating point instruction when the floating point available bit in the MSR (machine status register) was disabled.
如果在MSR(机器状态寄存器)中可用的浮点位被禁用，将尝试执行一个浮点指令。
3
Vega processors included a custom read barrier instruction that included bit field checking in reference metadata as well as special virtual memory protection for GC-compacted pages.